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<title> Issues in High Performance VLSI </title>

<h1> Issues in High Performance VLSI</h1>


The abstracts of papers by members of this group in the above area are 
listed below. Please use the email addresses at the end of each
abstract to get further details.

<ul>

<li>Kai-Yuan Chao and D.F. Wong
<b>Layer Assignment for High-Performance Multi-Chip Modules </b>. In
<cite>Proceedings of the IEEE International Symposium on Circuits and Systems </cite>,
April 1995. <p>

<blockquote>
In this paper, we present a layer assignment method for 
high-performance multi-chip module environments.  In 
contrast with treating global routing and layer assignment 
separately, our method assigns nets to layers while 
considering preferable global routing topologies 
simultaneously.  We take transmission line effects into 
account to avoid noise in high-speed circuit packages.  The 
problem is formulated as a quadratic Boolean programming 
problem and an algorithm is presented to solve the 
problem after linearization.  Our method is applied to a set 
of benchmark circuits to demonstrate the effectiveness.
</blockquote>
<b>Contact:</b> <i>chao@cs.utexas.edu</i><p>

<li> Shashidhar Thakur, Kai-Yuan Chao and D.F. Wong.
<b> An Optimal Layer Assignment Algorithm for Minimizing
Crosstalk for Three Layer VHV Channel Routing</b>.
<cite>Proceedings of the IEEE International Symposium
on Circuits and Systems, </cite> April 1995.</a>
<p>

<blockquote>
With the increasing density of VLSI circuits, the
interconnection wires are getting packed even closer. This
has increased the effect of interaction between these wires
on circuit performance and hence, the importance of
controlling crosstalk. We consider the gridded channel
routing problem where, specifically, the channel has 3 routing
layers in the VHV configuration. Given a horizontal track
assignment for the nets, we present an optimal algorithm for
minimizing the crosstalk between vertical wiring segments in
the channel by finding an optimal vertical layer assignment
for them. We show an algorithm that minimizes total
crosstalk between between wires on the same V layer on
adjacent columns of the grid in O(v log v) time using 
O(v) memory, where  the channel has v columns. We
then extend this algorithm to consider crosstalk between
wires in non-adjacent columns and between wires on different
layers.
</blockquote>
<b>Contact:</b> <i>thakur@cs.utexas.edu</i><p>

</ul>
